1. Field of the Invention
This invention relates to the field of integrated circuits. More particularly, this invention relates to integrated circuits which use speculative execution techniques whereby output signals of processing circuitry within the integrated circuit are used for further processing speculating that the values used are correct and, if it is subsequently determined that they are not correct, then error recovery operations are used to repair the errors.
2. Description of the Prior Art
It is known to provide integrated circuits using speculative execution techniques. PCT Published Patent Application No. WO-A-2004/084072 describes an integrated circuit including pipeline stages incorporating so called “Razor” latches which capture the output from a processing stage and pass this to a next processing stage at the end of one clock cycle and then subsequently evaluate whether or not the signals captured and passed forward were correct. The processing performed based upon the signals passed to the next pipeline stage is speculative in the sense that it proceeds based upon an assumption that the signals are correct. If it is determined that the signals are incorrect, then an error recovery operation is initiated. The use of these techniques allows, among other advantages, lower operating voltages and/or higher operating speeds to be achieved with less power consumption since the integrated circuit can be operated closer to the limit of failure and when errors do occur then they can be detected and repaired.
Whilst the above techniques do produce significant improvements in the performance of an integrated circuit, the need to recover from erroneous operation nevertheless inflicts a performance penalty which it would be desirable to reduce. This performance penalty is greater in the case of high performance processors using deeply pipelined processing arrangements since the pipeline flushes that are typically used as part of error recovery involves the flushing of deep pipelines which take many processing cycles to refill. Measures which can reduce the performance penalty associated with the speculative processing within such systems are advantageous.